The present invention relates to semiconductor hybrid arrays and, more particularly, to bump interconnects for high density hybrid arrays.
Typically, in fabricating hybrids such as those used in a focal plane array, a matrix of photodetectors is interconnected with a readout array by bump interconnects. The interconnects are typically metallic bumps that are formed on two separate surfaces. The present state of the art for high density semiconductor hybrid arrays may provide, for example, a 128.times.128 array of detectors on 40 micron centers, with each detector being on the order of 40 micrometers or smaller.
Conventional bumps used in hybrid construction have a round shape. Any misalignment (translational or rotational) drastically changes the interconnect area and thus the pressure applied to the hybrid assembly. Misalignment causes slippage during assembly. In high density hybrid construction, round bumps suffer from excessive "mash out" which produces an increase in size of the formed interconnect. This causes adjacent bumps to short out. Because of these disadvantages, high density hybrid assemblies using conventional round bump interconnects typically have a low yield in production.
Accordingly, it is an objective of the present invention to provide interconnect bumps for high density hybrids that have a high yield in production. Another objective of the invention is the provision of bump interconnects for high density hybrids that do not suffer from misalignment due to excessive "mash out" and slippage. A further objective of the present invention is to provide for mating interconnect bumps on two adjacent surfaces without resulting in a reduced interconnect area after merging. Yet another objective of the invention is the provision of a high density interconnect arrangement for hybrid semiconductor arrays which reduces the risk of electrical short circuits between adjacent interconnect bumps.